MOS field-effect transistors with very thin gate dielectrics made from silicon dioxide may experience unacceptable gate leakage currents. Forming the gate dielectric from certain high-k dielectric materials, instead of silicon dioxide, can reduce gate leakage. Because, however, such a dielectric may not be compatible with polysilicon, it may be desirable to use metal gate electrodes in devices that include high-k gate dielectrics.
When making a CMOS device that includes metal gate electrodes, a replacement gate process may be used to form gate electrodes from different metals. In that process, a first polysilicon layer, bracketed by a pair of spacers, is removed to create a trench between the spacers. The trench is filled with a first metal. A second polysilicon layer is then removed, and replaced with a second metal that differs from the first metal.
In certain devices, e.g., SRAMs, n-type and p-type metal layers contact each other at a P/N junction. For such devices to function properly, current must flow across that junction. When, however, a replacement gate process is used to form such a device, the dielectric layers upon which the metal layers are deposited may impede current flow between those metal layers. Such a process may impede current flow if those dielectric layers form on the sidewalls of the trenches, which receive the metal layers, in addition to forming on the trench floors. When forming on the trench sidewalls, the dielectric layers may act as an insulator that hinders current flow from one metal layer, which is positioned on one side of the dielectric layers, to another metal layer, which is positioned on the other side of the dielectric layers.
Accordingly, there is a need for a replacement gate process that enables current flow between metal layers that are formed on a high-k gate dielectric layer and that meet at a PIN junction. The method of the present invention provides such a process.
Features shown in these figures are not intended to be drawn to scale.